a. Consider the CMOS inverter shown in Figure 4.5(a). Assuming that it does not exhibit any current.


a. Consider the CMOS inverter shown in Figure 4.5(a). Assuming that it does not evince any present leakage when in regular set-forth, what is its static command decrease?

b. Suppose that the circumference presents a leakage present from VDD to GND of 1 pA conjuncture in regular set-forth and specific delay VDD = 3.3 V. Calculate the identical static command decrease.