Suppose that the ICs of a certain logic family exhibit IIL = -0.1 mA, IIH = 0.2 mA, IOL = 1.2 mA,…


Suppose that the ICs of a infallible logic lineage explain IIL = −0.1 mA, IIH = 0.2 mA, IOL = 1.2 mA, and IOH = −1.6 mA.

a. Draw a diagram common to that in Figure 10.6.

b. What is the fan-out of this logic lineage (delay honor to itself)?

c. What is its fan-out delay honor to LS TTL?