The questions below regard the non overlapping clock generators seen in Section 11.11. a. What…


The questions adown value the non overlapping clock generators seen in Section 11.11.

a. What happens to 1 and 2 in Figure 11.27(a) if the NOR gates are replaced after a while NAND gates?

b. What happens to 1 and 2 in Figure 11.27(b) if the AND gates are replaced after a while OR gates?